1. Field of the Invention
The invention pertains to microcontrollers, and more particularly, to a microcontroller system and method for enabling direct selection of operating modes upon reset or start-up.
2. Description of the Related Art
Microcontrollers are used in a wide variety of products where computerized control is desired. A typical microcontroller includes on the same integrated circuit ("chip") a microprocessor core (CPU) along with circuits for performing various input, output, and memory functions.
Microcontrollers are programmed to interface with the various electronic and electro-mechanical systems of a host product. A microcontroller provided with end-of-line or field programming capability allows user code to be programmed into the microcontroller either during the final step of manufacturing prior to shipping, or in the product via a predefined user programming interface. The latter programming option, popularly known as the "in-system program" (ISP) capability, is accomplished by placing the microcontroller in a specific programming mode called the ISP operating mode. The ISP code implementing the ISP mode typically resides on the chip, with the user providing information and verifying the result through the predefined interface.
In the prior art, the ISP code resides at a predetermined address within the same memory space ("user space") as the USER code. Typically, the starting address of the ISP code is set equal to the default value of the CPU's first start address. The USER code's starting address is placed at some other address of the user space. Upon start-up or reset, the microcontroller begins executing the ISP code in user space from the CPU default starting address. Thus, the microcontroller in the prior art is forced to execute the ISP programming code first, even though the USER mode may be desired.
An example of the reset system and method of the prior art is shown in FIG. 1. Upon startup or reset 10 the microcontroller jumps at step 30 to the default starting address of the program code in user space to begin executing program code in user space. Since the starting address of the program code in user space is also the starting address of the ISP code, the CPU begins execution of the ISP code section of program memory (step 34) even though a different post-reset mode may be desired. To avoid unnecessarily entering the ISP mode, a solution of the prior art is to have the desired mode be indicated by a register which stores the logic state of environment pins. The state of the environment pins is set by the user. In that solution, the first line of ISP code instructs the CPU to check the environment register to determine whether to place the microcontroller in ISP mode or in USER mode (step 40). The CPU is instructed to continue execution of code in ISP mode or, alternatively, to jump to a USER code start address depending on how the environment register is set. If ISP mode is selected, the processor continues to sequentially execute the ISP code to perform in-system programming (step 50) of the microcontroller. Once programming is complete, a decision may optionally be made to either halt further execution of program code (step 65), go to the USER mode (step 60), or reset the microcontroller. If USER mode is selected, the CPU jumps to the USER code starting address (step 70).
Alternatively, the USER code can be placed at the starting address of the user space and the ISP code placed elsewhere in the user space. In this event, the USER code is executed first as the default mode at reset. The microcontroller does not execute ISP code until expressly branched to from the USER code. While this configuration eliminates the additional cycles that would ordinarily be required to determine if USER mode is desired, as when the ISP code is at the starting address of the program code, additional program instructions in USER code are required, as well as additional CPU bus cycles, however, to effect branching to the ISP code. Further, in this configuration, the ISP code residing in user space, is subjected to a memory size constraint, and risks being overwritten by USER code.
A problem associated with placing both the USER code and the ISP code in user space, as is done in the reset systems of prior art microcontrollers, is the fixed amount of memory space available to the ISP code. In the event the amount of memory required for the ISP code exceeds the original predetermined allocation, it may be difficult or impossible to increase the amount of memory available to the ISP code since the USER code typically begins at an address immediately following the ISP code, thus bounding the size of memory available to the ISP code. As a result, any improvements or enhancements in the ISP code that require additional memory beyond the previous allocation cannot be accommodated. Thus any advantage that might otherwise be enjoyed by providing an enhanced ISP code will not be available to the microcontroller.
A related problem associated with locating the ISP code in user space is the possibility that ISP code may be written over by new USER code. Since in-system programmable microcontrollers can be programmed in the host product, a programmer can inadvertently overwrite the ISP code with modified or upgraded USER code, thus destroying future ISP capability.
Accordingly, there is a need for a microcontroller reset system and method that does not limit the amount of memory available for ISP code. There is also a need for a microcontroller reset system and method wherein the code associated with the desired operating mode is independent of, or transparent to, any other code associated with an alternate operating mode, thus permitting immediate execution of the code associated with the desired operating mode without first going to an alternate mode and the additional step of a branch instruction.